Semiconductor products are mass produced by fabricating circuitry on wafers in large factories called “fabs”. Electronic circuits are gradually created on a wafer made of pure semiconducting material. Typically, the wafers are silicon based, but other types of materials, such as Gallium Arsenide, Gallium Nitride, Silicon Carbide, etc. may also be used for special applications. In semiconductor device fabrication, the various processing steps typically fall into four general categories: deposition, removal, patterning, and modification of electrical properties.
Deposition is any process that grows, coats, or otherwise transfers a material onto the wafer. Available technologies include physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE) and more recently, atomic layer deposition (ALD), among others.
Removal is any process that removes material from the wafer; examples include etch processes (either wet or dry) and chemical-mechanical planarization (CMP).
Patterning is the shaping or altering of deposited materials, and is generally referred to as lithography. For example, in conventional lithography, the wafer is coated with a chemical called a photo-resist; then, a machine called a stepper focuses, aligns, and moves a mask, exposing select portions of the wafer below to short wavelength light; the exposed regions are washed away by a developer solution. After etching or other processing, the remaining photo-resist is removed by plasma etching.
Modification of electrical properties has historically entailed doping transistor sources and drains. This is typically done by diffusion furnaces or by ion implantation. These doping processes are followed by furnace annealing; in advanced devices, rapid thermal annealing (RTA) may be performed. Annealing serves to activate the implanted dopants. Modification of electrical properties may be performed using other techniques, such as by reducing a material's dielectric constant in low-k insulators via exposure to ultraviolet light in UV processing (UVP), for example.
After the wafers are completed and tested, the good devices resulting from that step are typically packaged and then tested again after the packaging process. In some cases, there may be multiple probe test steps and/or multiple package test steps. The steps used to produce the wafers and packaged devices are very complicated and the complexity grows with each subsequent generation of semiconductor technology. There are many opportunities for simple errors and complex interactions in the manufacturing process which can lead to the creation of defective devices.
Other features of the present embodiments will be apparent from the accompanying drawings and from the detailed description that follows.